(module LIS2DUX12TR (layer F.Cu)
  (fp_text reference REF** (at 0 0) (layer F.SilkS))
  (fp_text value LGA-12_2.0X2.0X0.74_LIS2DUX12_STM (at 0 0) (layer F.SilkS))
  (fp_text user "Copyright 2016 Accelerated Designs. All rights reserved." (at 0 0) (layer Cmts.User))
  (fp_text user "0.02in/0.5mm" (at -2.7305 -0.5) (layer Cmts.User))
  (fp_text user "0.012in/0.305mm" (at -0.8001 -3.8481) (layer Cmts.User))
  (fp_text user "0.011in/0.279mm" (at -3.8481 0.8001) (layer Cmts.User))
  (fp_text user "0.063in/1.6mm" (at 0 6.3881) (layer Cmts.User))
  (fp_text user "0.063in/1.6mm" (at 6.3881 0.635) (layer Cmts.User))
  (fp_text user "*" (at -1.5875 -1) (layer F.SilkS))
  (fp_text user "*" (at -0.6477 -1) (layer F.Fab))
  (pad 1 smd rect (at -0.8001 -0.750001 90) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 2 smd rect (at -0.8001 -0.25 90) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 3 smd rect (at -0.8001 0.25 90) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 4 smd rect (at -0.8001 0.750001 90) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 5 smd rect (at -0.25 0.8001) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 6 smd rect (at 0.25 0.8001) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 7 smd rect (at 0.8001 0.750001 90) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 8 smd rect (at 0.8001 0.25 90) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 9 smd rect (at 0.8001 -0.25 90) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 10 smd rect (at 0.8001 -0.750001 90) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 11 smd rect (at 0.25 -0.8001) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
  (pad 12 smd rect (at -0.25 -0.8001) (size 0.2794 0.3048) (layers F.Cu F.Paste F.Mask))
)
